Couverture de High-Performance Packet Switching Architectures
Titre du livre:

High-Performance Packet Switching Architectures

Packet switch design for high-performance, integrated, scalable data centers

LAP LAMBERT Academic Publishing (15-07-2011 )

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ISBN-13:

978-3-8454-0794-4

ISBN-10:
3845407948
EAN:
9783845407944
Langue du livre:
Anglais
texte du rabat:
Packet switches are at the heart of modern communication networks. Initially deployed for local- and wide-area computer networking, they are now being used in different contexts, such as interconnection networks for High-Performance Computing (HPC), Storage Area Networks (SANs) and Systems-on-Chip (SoC) communication. Each application domain, however, has peculiar requirements in terms of bandwidth, latency, scalability and delivery guarantee.In this thesis we present two novel switching architectures, aimed at shared-memory supercomputing and storage networking respectively. We describe the general architecture of the two systems and discuss how specific requirements and current technology trends have impacted the design. More important, we present architectural innovations that address important issues concerning performance and scalability of input-queued switches.We propose techniques that enable the construction of distributed (multi-chip) schedulers for large crossbars, develop a scheme for integrated scheduling of unicast and multicast traffic and and study flow-control mechanisms that enable lossless behavior while providing fine-grained control of active flows.
Maison d'édition:
LAP LAMBERT Academic Publishing
Site Web:
https://www.lap-publishing.com/
de (auteur) :
Enrico Schiattarella
Numéro de pages:
140
Publié le:
15-07-2011
Stock:
Disponible
Catégorie:
Reseaux, Communication de données
Prix:
59.00 €
Mots-clés:
packet switching crossbar scheduling optical networks data center HPC storage networking

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