Portada del libro de Synchronous dynamic Random-access Memory
Título del libro:

Synchronous dynamic Random-access Memory

Dynamic random-access memory, System bus, Clock signal

Spir (2012-07-09 )

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ISBN-13:

978-620-1-55429-0

ISBN-10:
6201554297
EAN:
9786201554290
Idioma del libro:
Inglés
Notas y citas / Texto breve:
Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. Synchronous dynamic random access memory is dynamic random access memory that is synchronized with the system bus. Classic DRAM has an asynchronous interface, which means that it responds as quickly as possible to changes in control inputs. SDRAM has a synchronous interface, meaning that it waits for a clock signal before responding to control inputs and is therefore synchronized with the computer's system bus. The clock is used to drive an internal finite state machine that pipelines incoming commands. This allows the chip to have a more complex pattern of operation than an asynchronous DRAM, enabling higher speeds. Pipelining means that the chip can accept a new command before it has finished processing the previous one.
Editorial:
Spir
Sitio web:
http://www.betascript-publishing.com
Editado por:
Antigone Fernande
Número de páginas:
76
Publicado en:
2012-07-09
Stock:
Disponible
Categoría:
Informática, IT
Precio:
34.00 €
Palabras clave:
Access, dynamic, Interface, Memory, synchronous, Random

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